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After the U.S. recently imposed more restrictions aimed at suppressing the computing power of China's supercomputers, Chinese technology companies Alibaba and Biren Technology are reportedly fine-tuning their most advanced chip designs to reduce computing speed in order to avoid sanctions. .
The British "Financial Times" reported on the 7th that Alibaba, Biren and other Chinese chip design companies have invested millions of dollars over the years to develop blueprints for advanced processors for China's next-generation supercomputers, artificial intelligence (AI) algorithms and data. required for the operation of the center. But those processors are made outside China by TSMC, the world's largest chip foundry.
Washington announced new measures in October that any semiconductor products with computing power exceeding a certain threshold must be exported to China without prior permission. This disrupts the development plans of the aforementioned Chinese tech companies.
The report pointed out that when the U.S. announced the new control measures, Alibaba and Biren had already started testing their latest chip products, which were expensive. Six people briefed on the matter said the new rules forced the two companies to halt further production work and adjust their respective chip designs.
The threshold of the US ban is that the bidirectional transfer rate of the chip must not be higher than 600GB per second. But Chinese engineers say it's not easy to tell which chip products are exempt from sanctions because Washington has no clear guidelines on how to calculate that rate.
Research group Bernstein estimates that, judging from records on Biren's official website, the specifications of Biren's first processor, the BR100, calculated a transfer rate of 640GB/s before the U.S. announced new controls; but Biren's official website is currently The released BR100 specification reduces the transfer rate to 576GB/s.
Dylan Patel, principal analyst at semiconductor research group SemiAnalysis, was the first to notice the modification to the BR100 specification. He pointed out that this is a wall to slow down the processor by making the chip lose local functions.
